1. Field of the Invention
The present invention relates to a high-speed digital integrated circuit device and, more particularly, to a timing controller for generating an RF timing signal for a digital integrated circuit having transistors which operate at high speed on the gigahertz order.
2. Description of the Related Art
With the increasing needs for high performance of large digital systems, the technique for increasing operation speeds of highly integrated electronic components such as ICs and LSIs becomes indispensable. Especially in digital communication systems, very high-speed digital ICs such as multiplexers and demultiplexers including GaAs Schottky gate FETs (or GaAs MESFETs) and capable of operating on the gigahertz order have been required.
Such very high-speed digital ICs must incorporate therein a timing controller for receiving an RF clock signal and generating a necessary synchronous signal. However, a conventional timing controller suffers from a problem that it is very difficult to supply, to a transistor internal IC, a synchronous signal which accurately synchronizes with the transistor internal IC operating at high speed in the same phase and at a desired timing on the basis of a clock signal having a desired radio frequency (e.g., a pulse width of the signal is about several hundred picoseconds). In order to solve this problem, a reset circuit is additionally formed. The reset circuit adequately resets the timing controller so that the RF clock signal can synchronize with the internal IC in the same phase at a desired timing.
Such a digital IC having a reset function poses another problem that its circuit arrangement is complicated, since a considerably large number of transistors are used to constitute the reset circuit. In addition, this reset circuit is not suitable for a digital IC which operates at very high speed, since a signal transfer delay in its signal wiring interferes with accurate setting of a reset pulse and it becomes difficult to precisely control a reset interval.